1. Field of the Invention
The present invention relates generally to methods of fabricating an electronic component with a semiconductor chip or a similar chip element (hereinafter referred to as a xe2x80x9cchipxe2x80x9d) mounted on a substrate and apparatuses used therefor, and particularly to methods of efficiently fabricating the electronic component and apparatuses used therefor.
2. Description of the Background Art
An electronic component including a substrate having a plurality of regions each with a chip mounted thereon, is conventionally fabricated through the following process: Initially, at each region a chip is mounted, and an electrode of each chip and that of each region are electrically connected together. Then, a dispenser is used to drop liquefied resin onto each region. Then, the liquified resin is cured to seal the chip on the substrate at each region with the resin. Then, the substrate is cut to provide an electronic component having a single chip resin-sealed at a single region. Finally, a test board is used to provide current conduction through each electronic component placed in a predetermined ambient at a predetermined temperature to burn-in the same and also to conduct an operation test on the same to screen out any defective component and thus obtain good components.
In the above conventional method of fabricating an electronic component, however, to seal with resin a chip on a substrate at each region, liquefied resin is dropped onto each one of chips and cured. This is time consuming and the electronic component is thus fabricated inefficiently.
Furthermore, after the substrate is cut separate electronic components are subjected to burn-in and an operation test. This entails for example the step of transporting the electronic components and attaching and detaching them to and from a socket of a test board and the step of selecting a good electronic component and transporting and placing it on a tray. This also results in an electronic component being fabricated inefficiently.
Furthermore, liquefied resin dropped and cured can disadvantageously have a dimension with low precision if the resin has an insufficiently controlled viscosity or it cures under an insufficiently controlled condition.
To overcome the above, conventional disadvantages, the present invention contemplates a method of efficiently fabricating an electronic component having a dimension with high precision and an apparatus used therefor.
To achieve the above object, the present invention provides a method of fabricating an electronic component, which generally involves mounting a respective chip on a substrate at each of a plurality of regions, sealing the same with sealing resin and then cutting the substrate to provide the electronic component each including one of the plurality of regions, the chip and the sealing resin. Particularly, the inventive method includes the steps of: placing the respective chip at each of the plurality of regions; electrically connecting together a substrate electrode of each of the plurality of regions and a chip electrode of each chip; applying the sealing resin on the plurality of regions to seal the substrate; before cutting the substrate, applying a predetermined, testing electrical signal via an external electrode provided for each of the plurality of regions for the purpose of allowing the electronic component to externally communicate an electrical signal to test an operation of each electronic component; and thereafter cutting the substrate having the plurality of regions sealed with resin, to separate each of the plurality of regions.
In the present invention, chips can be collectively sealed while a substrate is as it is, i.e., before the substrate is cut. As such, the number of sealing process steps can be reduced. Furthermore, individual electronic components can be tested through conduction while the substrate is as it is. As such, it is not necessary to transport each chip to a test apparatus or attach or detach the chip to and from the test apparatus. As such, the number of the steps for the test can be reduced. Thus, an electronic component can be fabricated in a process with a reduced number of steps and hence efficiently.
The present invention in one embodiment provides the method of fabricating an electronic component, wherein at a testing step the substrate having the plurality of regions sealed is arranged in a predetermined ambient at a predetermined temperature. Since an electrical signal is applied to the external electrode in the predetermined ambient at the predetermined temperature to test an operation of the electronic component, the electronic component can be efficiently burnt in with the substrate as it is.
Furthermore the present invention provides the method of fabricating an electronic component that may further include the step of providing a protruding electrode on the external electrode of the substrate having the plurality of regions sealed. As such, protruding electrodes can be collectively formed on external electrodes of electronic components while the substrate is as it is. As such, the number of the process steps of providing an electronic component with a protruding electrode can be reduced.
Furthermore the present invention in one embodiment provides the method of fabricating an electronic component, wherein the step of using includes placing the substrate in alignment with a die alignment plane of a die set formed of at least two dies facing each other, clamping the die set, and injecting melted resin into a cavity formed by the die set and the substrate and curing the melted resin therein to provide the sealing resin.
In such a step as above, the substrate can have a plurality of regions collectively sealed with resin. As such, it is not necessary to seal each chip individually when each chip is sealed on the substrate at a respective region. As such, the number of sealing steps can be reduced. Furthermore, melted resin can be injected into a cavity of a closed space and cured therein and the sealing resin can thus have a dimension with high precision.
Furthermore the present invention provides the method of fabricating an electronic component, preferably further including the step of vacuuming the cavity, wherein the melted resin is injected into the vacuumed cavity. As such, in collectively sealing the plurality of regions of substrate, a void can be minimized and the melted resin can thus be injected into the entire region of the cavity reliably.
The present invention provides an apparatus used to fabricate an electronic component, generally involving mounting a respective chip on a substrate at a plurality of regions, sealing the same with sealing resin and then cutting the substrate to provide the electronic component respectively including the region, the chip and the sealing resin. The apparatus includes bonding means placing the respective chip on each of the plurality of regions; connection means electrically connecting together a substrate electrode of each region and a chip electrode of each chip; sealing means providing the sealing resin over the plurality of regions; testing means communicating an electrical testing signal to test an operation of each electronic component, the electrical signal being communicated via an external electrode provided at each region to allow the electronic component to externally communicate an electrical signal; and cutting means cutting the substrate having the plurality of regions sealed with the sealing resin, to provide the electronic component being separated.
The present invention in one embodiment provides the apparatus used to fabricate an electronic component, wherein the testing means applies the predetermined electrical signal via the external electrode when the substrate having the plurality of regions sealed with the sealing resin is placed in a predetermined ambient at a predetermined temperature.
Furthermore the present invention provides the apparatus used to fabricate an electronic component that may further include electrode forming means forming a protruding electrode on the external electrode of substrate having the plurality of regions sealed with the sealing resin.
Furthermore the present invention in one embodiment provides the apparatus used to fabricate an electronic component, wherein the sealing means includes: a die set including at least two dies facing each other; and injection means injecting melted resin into a cavity formed by the die set and the substrate aligned with a die alignment plane of the die set.
Furthermore the present invention provides the apparatus used to fabricate an electronic component, wherein preferably the sealing means further includes means vacuuming the cavity.
Configured as described above, the present invention can provide the apparatus used to fabricate an electronic component, to implement the above-described method of fabricating an electronic component in accordance with the present invention.
Thus, in the present invention, sealing each chip with resin one by one can be dispensed with and so can transporting each electronic component to a test apparatus and a burn-in apparatus and attaching and detaching the electronic component to and from such apparatuses. Furthermore, melted resin can cure in the cavity corresponding to a closed space and it can thus have a dimension with high precision to reliably seal chips. Furthermore, the cavity receiving the melted resin can be vacuumed to prevent a void to allow the melted resin to be injected into the entire region of the cavity reliably.
Thus the present invention can provide a superior, practical effect providing an electronic component including sealing resin having a dimension with high precision and a high quality, in a process with a reduced number of steps and hence efficiently.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.